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MB3773 power supply monitor with watch-dog timer cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document number: 002-08513 rev. *a revised april 4, 2016 MB3773 generates the re set signal to pr otect an arbitrary system w hen the power-supply voltage momentarily is intercepted or decreased. it is ic for the power-supply voltage watch and ?power on reset? is generated at the normal return of the power supp ly. MB3773 sends the microprocessor the reset signal when decreasi ng more than the volta ge, which the power supply of the system specified, and the computer data is pr otected from an accidental deletion. in addition, the watch-dog time r for the operation dia gnosis of the system is built into , and various microprocessor systems ca n provide the fail-safe function. if MB3773 does not receive the clock pulse from the processor for a specified period, MB3773 generates the reset signal. features precision voltage detection (v s = 4.2 v ? 2.5%) detection threshold voltage has hysteresis function low voltage output for reset signal (v cc = 0.8 v typ) precision reference voltage output (v r = 1.245 v ? 1.5%) with built-in watch-dog timer of edge trigger input. external parts are few.(1 piece in capacity) the reset signal outputs the positive and negative both theories reason. one type of package (sop-8pin : 1 type) application industrial equipment arcade amusement etc.
MB3773 document number: 002-08513 rev. *a page 2 of 31 contents pin assignment ................................................................ 3 block diagram .................................................................. 4 functional descriptions ................................................... 5 operation sequence ......................................................... 7 absolute maximum ratings ........................................... 8 recommended operating conditions ............................ 8 electrical characteristics ................................................. 9 dc characteristics ...................................................... 9 ac characteristics ..................................................... 10 typical characteristic curves ....................................... 11 application circuit .......................................................... 14 notes on use ................................................................... 26 ordering information ...................................................... 26 rohs compliance information of lead (pb) free version .................................................................... 26 marking format (lead free version) ........................... 27 labeling sample (lead free vers ion) ........................... 27 MB3773pf- ??? e1 recommended conditions of moisture sensitivity level ............................................. 28 package dimension ........................................................ 29 document history ........................................................... 30
MB3773 document number: 002-08513 rev. *a page 3 of 31 1. pin assignment c t reset ck gnd reset v s v ref v cc 1 2 3 4 8 7 6 5 (top view) (fpt-8p-m01)
MB3773 document number: 002-08513 rev. *a page 4 of 31 2. block diagram c t + _ + _ 8 2 7 3 1 4 5 gnd reset v s v c r s q : = 1.24 v : = 40 k ? : = 1.24 v : = 10 ? a : = 1.2 ? a : = 100 k ? watch- dog timer p.g + _ reference voltage generator + _ reference amp v ref 6 comp.o reset : = 10 ? a inhibit ck comp.s
MB3773 document number: 002-08513 rev. *a page 5 of 31 3. functional descriptions comp.s is comparator including hysteresis. it compare the refer ence voltage and the voltage of vs, so that when the voltage of vs terminal falls below approximately 1.23 v, reset signal outputs. instantaneous breaks or drops in the power can be detect ed as abnormal conditions by the MB3773 within a 2 s interval. however because momentary breaks or drops of this duration do not cause problems in actual systems in so me cases, a delayed trigger function can be created by connecting capacitors to the vs terminal. comp.o is comparator for turning on/off th e output and, compare the voltage of the c t terminal and the threshold voltage. because the reset/reset outputs have built-in pull-up circuit, there is no need to connect to external pull-up resistor when connected to a high impedance load such as cmos logic ic. (it corresponds to 500 k ? at vcc = 5 v.) when the voltage of the ck terminal chang es from the ?high? level into the ?low? level, pulse generator is sent to the watch-dog timer by generating the pulse momentarily at the time of drop from the threshold level. when power-supply voltages fall more than detecting vo ltages, the watch-dog timer becomes an interdiction. the reference amplifier is an op-amp to output the reference voltage. if the comparator is put up outside, two or more power-su pply voltage monitor and overvoltage monitor can be done. if it uses a comparator of the open-collec tor output, and the output of the comparator is connected with the vs terminal of mb3 773 without the pull-up resistor, it is possible to voltage monitor with reset-hold time.
MB3773 document number: 002-08513 rev. *a page 6 of 31 reset v cc v sh v sl 0.8 v ck c t t ck t pr t wd t wr t pr (1) (2) (3)(4)(5) (5) (6) (7) (8)(9) (10) (11) (12) MB3773 basic operation v cc reset reset ck logic circuit t pr (ms) : = 1000 c t ( ? f) t wd (ms) : = 100 c t ( ? f) t wr (ms) : = 20 c t ( ? f) example : c t ? 0.1 f t rr (ms) : = 100 (ms) t wd (ms) : = 10 (ms) t wr (ms) : = 2 (ms) reset reset ck gnd c t v cc
MB3773 document number: 002-08513 rev. *a page 7 of 31 4. operation sequence 1. when vcc rises to about 0.8 v, reset goes ?low? and reset goes ?high?. the pull-up current of approximately 1 a (vcc = 0.8 v) is output from reset. 2. when vcc rises to v sh ( : = 4.3v) , the charge with c t starts. at this time, the ou tput is being reset. 3. when c t begins charging, reset goes ?high? and reset goes ?low?. after t pr reset of the output is released. reset hold time: t pr (ms) : = 1000 c t ( f) after releasing reset, the discharge of c t starts, and watch-dog timer operation starts. t pr is not influenced by the ck input. 4. c changes from the discharge into the ch arge if the clock (negative edge) is input to the ck terminal while discharging c t . 5. c changes from the charge into the discharge when the voltage of c t reaches a constant threshold ( : = 1.4 v) . 4 and 5 are repeated while a normal clock is input by the logic system. 6. when the clock is cut off, gets, and the voltage of c t falls on threshold ( : = 0.4 v) of reset on, reset goes ?low? and reset goes ?high?. discharge time of c t until reset is output: t wd is watch-dog timer monitoring time. t wd (ms) : = 100 c t ( f) because the charging time of c t is added at accurate time from stop of the clock and getting to the output of reset of the clock, t wd becomes maximum t wd ? t wr by minimum t wd . 7. reset time in operating watch-dog timer: t wr is charging time where the voltage of c t goes up to off threshold ( : = 1.4 v) for reset. t wr (ms) : = 20 c t ( f) reset of the output is released after c t reaches an off threshold for reset, and c t starts the discharge, after that if the clock is normally input, operation repeats 4 and 5, when the clock is cut off, operationrepeats 6 and 7. 8. when vcc falls on v sl ( : = 4.2 v) , reset is output. c t is rapidly discharged of at the same time. 9. when vcc goes up to v sh , the charge with c t is started. when vcc is momentarily low, after falling v sl or less vcc, the time to going up is the standard value of the vcc input pulse width in v sh or more. after the charge of c t is discharged, the charge is started if it is t pi or more. 10.reset of the output is released after t pr , after vcc becomes v sh or more, and the watch-dog timer starts. after that, when vcc becomes v sl or less, 8 to 10 is repeated. 11.while power supply is off, when vcc becomes v sl or less, reset is output. 12.the reset output is maintained until vcc becomes 0.8 v when vcc falls on 0 v.
MB3773 document number: 002-08513 rev. *a page 8 of 31 5. absolute maximum ratings warning: semiconductor devices can be permanently damaged by appl ication of stress (voltage, cu rrent, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. 6. recommended operating conditions warning: the recommended operating conditions are required in or der to ensure the normal operation of the semiconductor device.all of the device?s electrical characteristics ar e warranted when the device is operated within these ranges. always use semiconductor devices within their recomme nded operating condition ranges. operation outside these ranges may adversely affect reliabilit y and could result in device failure. no warranty is made with respect to uses, operating conditi ons, or combinations not r epresented on the data sheet. users considering application outside the listed conditions are advised to contact their cypress representatives beforehand. parameter symbol rating unit min max supply voltage v cc - 0.3 + 18 v input voltage v s - 0.3 v cc + 0.3 ( +18) v v ck - 0.3 + 18 v reset , reset supply voltage v oh - 0.3 v cc + 0.3 ( +18) v power dissipation (ta +85c) p d ? 200 mw storage temperature t stg - 55 + 125 c parameter symbol value unit min max supply voltage v cc + 3.5 + 16 v reset, reset sink current i ol 020ma vref output current i out - 200 + 5 a watch clock setting time t wd 0.1 1000 ms ck rising/falling time t fc , t rc ? 100 s terminal capacitance c t 0.001 10 f operating ambient temperature ta - 40 + 85 c
MB3773 document number: 002-08513 rev. *a page 9 of 31 7. electrical characteristics 7.1 dc characteristics (v cc = 5 v, ta = + 25c) parameter symbol condition value unit min typ max supply current i cc watch-dog timer operating ? 600 900 a detection voltage v sl v cc 4.10 4.20 4.30 v ta = - 40c to + 85c 4.05 4.20 4.35 v sh v cc 4.20 4.30 4.40 ta = - 40c to + 85c 4.15 4.30 4.45 hysteresis width v hys v cc 50 100 150 mv reference voltage v ref ? 1.227 1.245 1.263 v ta = - 40c to + 85c 1.215 1.245 1.275 reference voltage change rate ? v ref1 v cc = 3.5 v to 16 v ? 3 10 mv reference voltage output loading change rate ? v ref2 i out = - 200 a to + 5 a- 5?+ 5mv ck threshold voltage v th ta = - 40c to + 85c 0.8 1.25 2.0 v ck input current i ih v ck = 5.0 v ? 0 1.0 a i il v ck = 0.0 v - 1.0 - 0.1 ? c t discharge current i ctd watch-dog timer operating v ct = 1.0 v 71014 a high level output voltage v oh1 v s open, i reset = - 5 a4.54.9? v v oh2 v s = 0 v, i reset = - 5 a4.54.9? output saturation voltage v ol1 v s = 0 v, i reset = 3 ma ? 0.2 0.4 v v ol2 v s = 0 v, i reset = 10 ma ? 0.3 0.5 v ol3 v s open, i reset = 3 ma ? 0.2 0.4 v ol4 v s open, i reset = 10 ma ? 0.3 0.5 output sink current i ol1 v s = 0 v, v reset = 1.0 v 20 60 ? ma i ol2 v s open, v reset = 1.0 v 20 60 ? c t charge current i ctu power on reset operating v ct = 1.0 v 0.5 1.2 2.5 a min supply voltage for reset v ccl1 v reset = 0.4 v, i reset = 0.2 ma ?0.81.2v min supply voltage for reset v ccl2 v reset = v cc - 0.1 v, r l (between pin 2 and gnd) = 1 m ? ?0.81.2v
MB3773 document number: 002-08513 rev. *a page 10 of 31 7.2 ac characteristics (v cc = 5 v, ta = + 25c) * : output rising/falling time are measured at 10 % to 90 % of voltage. parameter symbol condition value unit min typ max v cc input pulse width t pi v cc 8.0 ? ? s ck input pulse width t ckw ck 3.0 ? ? s ck input frequency t ck ?20?? s watch-dog timer watching time t wd c t = 0.1 f 5 10 15 ms watch-dog timer reset time t wr c t = 0.1 f123ms rising reset hold time t pr c t = 0.1 f, v cc 50 100 150 ms output propagation delay time from vcc t pd1 reset , r l = 2.2 k ? , c l = 100 pf ?210 s t pd2 reset, r l = 2.2 k ? , c l = 100 pf ?310 output rising time* t r r l = 2.2 k ? , c l = 100 pf ?1.01.5 s output falling time* t f r l = 2.2 k ? , c l = 100 pf ?0.10.5 5 v 4 v or
MB3773 document number: 002-08513 rev. *a page 11 of 31 8. typical char acteristic curves (continued) 6.0 5.0 4.0 3.0 2.0 1.0 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 ta = + 85 c ta = + 25 c ta = ? 40 c 4.50 4.44 4.30 4.20 4.10 4.00 ? 40 ? 20 0 +20 +40 +60 +80 +100 v sh v sl 400 300 200 0 2.0 10.0 12.0 14.0 16.0 4.0 6.0 8.0 18.0 100 c t = 0.1 f ta = + 85 c ta = ? 40 c ta = + 25 c 400 300 200 100 0 2.0 10.0 12.0 14.0 16.0 4.0 6.0 8.0 18.0 c t = 0.1 f ta = ? 40 c ta = + 25 c ta = + 85 c 500 (reset , reset terminal) supply current vs. supply voltage supply voltage v cc (v) supply voltage v cc (v) output voltage vs. supply voltage (reset terminal) supply voltage vcc (v) pull up 2.2 k ? output voltage vs. supply voltage (reset terminal) detection voltage (v sh , v sl ) vs. operating ambient temperature operating ambient temp erature ta (c) output saturation voltage vs. output sink current (reset terminal) output sink current i ol2 (ma) output saturation voltage vs. output sink current (reset terminal) output sink current i ol8 (ma) pull up 2.2 k ? supply current i cc (ma) output voltage v reset (v) detection voltage v sh , v sl (v) output voltage v reset (v) output saturation voltage v ol2 (mv) output saturation voltage v ol2 (mv) 0.65 0.75 0.55 0.45 0.35 0.25 0.15 0 4.0 2.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0 ta = ? 40 c ta = ? 40 c ta = + 25 c ta = + 85 c c t = 0.1 f ta = + 25 c ta = + 85 c 6.0 5.0 4.0 3.0 2.0 1.0 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 ta = ? 40 c, + 25 c, + 85 c
MB3773 document number: 002-08513 rev. *a page 12 of 31 (continued) ta = + 25 c ta = + 85 c ta = ? 40 c c t = 0.1 f 5.0 4.5 4.0 0 ? 5 ? 10 ? 15 5.0 4.5 4.0 0 ? 5 ? 10 ? 15 c t = 0.1 f ta = + 25 c ta = + 85 c ta = ? 40 c 1.246 1.244 1.242 1.240 1.238 1.236 1.234 0 3.0 5.0 7.0 9.0 13.0 11.0 17.0 19.0 21.0 15.0 ta = ? 40 c ta = + 25 c ta = + 85 c c t = 0.1 f ta = + 85 c 1.255 1.250 1.245 1.240 0 ? 40 ? 80 ? 120 ? 160 ? 200 ? 240 c t = 0.1 f ta = + 25 c ta = ? 40 c ? 20 0 +20 ? 40 1.27 1.25 1.26 1.24 1.23 1.22 1.21 +40 +60 +80 +100 ? 20 0 +20 ? 40 +40 +60 +80 +100 160 140 120 100 80 60 0 40 c t = 0.1 f v cc = 5 v reference voltage vs. reference current high level output voltage vs. high level output current (reset terminal) high level output voltage vs. high level output current (reset terminal) reference voltage vs. supply voltage supply voltage v cc (v) reference current i ref ( a) reference voltage vs. operating ambient temperature operating ambient temperature ta (c) rising reset hold time vs. operating ambient temperature operating ambient te mperature ta (c) high level output current i oh2 ( a) high level output current i oh8 ( a) high level output voltage v oh2 (v) high level output voltage v oh8 (v) reference voltage v ref (v) reference voltage v ref (v) reference voltage v ref (v) rising reset hold time t pr (ms)
MB3773 document number: 002-08513 rev. *a page 13 of 31 (continued) 3 2 1 0 ? 40 ? 20 +20 0 +40 +60 +80 +100 c t = 0.1 f v cc = 5 v ? 40 ? 20 +20 0 +40 +60 +80 +100 16 14 12 10 8 6 4 0 c t = 0.1 f v cc = 5 v 10 6 10 5 10 4 10 3 10 2 10 1 10 0 10 ? 1 10 ? 2 10 ? 3 10 ? 3 10 ? 2 10 ? 1 10 0 10 1 10 2 ta = ? 40 c ta = + 25 c, + 85 c 10 ? 3 10 ? 2 10 ? 1 10 0 10 1 10 2 10 2 10 1 10 0 10 ? 1 10 ? 2 10 ? 3 ta = + 25 c, + 85 c ta = ? 40 c 10 6 10 5 10 4 10 3 10 2 10 1 10 0 10 ? 1 10 ? 2 10 ? 3 10 ? 3 10 ? 2 10 ? 1 10 0 10 1 10 2 ta = ? 40 c ta = + 25 c, + 85 c rising reset hold time vs. c t terminal capacitance watch-dog timer watching time vs. operating ambient temperature operating ambient temperature ta (c) reset time vs. operating ambient temperature operating ambient temp erature ta (c) c t terminal capacitance c t ( f) (at watch-dog timer) reset time vs. c t terminal capacitance watch-dog timer watching time vs. c t terminal capacitance c t terminal capacitance c t ( f) (at watch-dog timer) c t t erminal capacitance c t ( f) reset time t wr (ms) watch-dog timer watching time t wd (ms) rising reset hold time t pr (ms) reset time t wr (ms) watch-dog timer watching time t wd (ms) 10 ? 3 10 ? 2 10 ? 1 10 0 10 1 10 2 10 2 10 1 10 0 10 ? 1 10 ? 2 10 ? 3 ta = + 25 c, + 85 c ta = ? 40 c
MB3773 document number: 002-08513 rev. *a page 14 of 31 9. application circuit example 1: monitoring 5v supply voltage and watch-dog timer vcc (5v) MB3773 reset reset ck gnd logic circuit notes : ? supply voltage is monitored using v s . ? detection voltage are v sh and v sl . c t 1 2 3 4 8 7 6 5 example 2: 5v supply voltage monitoring (external fine-tuning type) v cc (5v) 1 2 3 4 8 7 6 5 MB3773 reset reset ck gnd logic circuit notes : ? vs detection voltage can be adjusted externally. ? based on selecting r 1 and r 2 values that are sufficiently lower than th e resistance of the ic?s internal voltage divider, the detection voltage can be set according to the resistance ratio of r 1 and r 2 (refer to the table below.) r 1 r 2 c t r 1 (k ? )r 2 (k ? ) detection voltage: v sl (v) detection voltage: v sh (v) 10 3.9 4.4 4.5 9.1 3.9 4.1 4.2
MB3773 document number: 002-08513 rev. *a page 15 of 31 example 3: with forced reset (with reset hold) v cc 1 2 3 4 8 7 6 5 MB3773 reset reset ck gnd logic circuit note : grounding pin 7 at the time of sw on sets reset (pin 8) to low and reset (pin 2) to high. sw v cc 1 2 3 4 8 7 6 5 MB3773 reset reset ck gnd logic circuit note : feeding the signal to terminal resin and tu rning on tr sets the reset terminal to low and the reset terminal to high. 10 k ? tr resin 10 k ? cr c t (a) (b)
MB3773 document number: 002-08513 rev. *a page 16 of 31 example 4: monitoring two supply voltages (with hysteresis, reset output and nmi ) v cc 1 (5 1 2 3 4 8 7 6 5 MB3773 reset reset ck gnd comp. 2 example : comp. 1, comp. 2 : mb4204, mb47393 nmi or port r 6 + _ + _ v cc2 (12 180 k ? r 4 30 k ? r 3 5.1 k ? r 2 1.2 k ? r 1 4.7 k ? r 5 comp. 1 notes : ? the 5 v supply voltage is monitored by the MB3773. ? the 12 v supply voltage is monitored by the exter nal circuit. its output is connected to the nmi terminal and, when voltage drops, comp. 2 interrupts the logic circuit. ? use v cc1 ( ? 5 v) to power the comparators (comp. 1 and comp. 2) in the external circuit shown above. ? the detection voltage of the v cc2 ( ? 12 v) supply voltage is approximatel y 9.2 v/9.4 v and has a hysteresis width of approximately 0.2 v. v cc2 detection voltage and hysteresis width ca n be found using the following formulas: detection voltage hysteresis width v hys ? v 2h ? v 2l r 3 ? (r 4 // r 5 ) r 4 // r 5 v ref v 2l ? r 3 ? r 5 r 5 v ref (approximately 9.4 v in the above illustration) (approximately 9.2 v in the above illustration) c t logic circuit v 2h ? 10 k ?
MB3773 document number: 002-08513 rev. *a page 17 of 31 example 5: monitoring two supply voltages (with hysteresis and reset output) v cc 1 (5 v) 1 2 3 4 8 7 6 5 MB3773 reset reset ck gnd comp. 2 example : comp. 1, comp. 2 : mb4204, mb47393 20 k ? r 6 + _ + _ v cc2 (12 180 k ? r 4 30 k ? r 3 5.1 k ? r 2 1.2 k ? r 1 4.7 k ? r 5 comp. 1 notes : ? when either 5 v or 12 v supply voltage decreases below its detection voltage (v sl ), the MB3773 reset terminal is set to high and the MB3773 reset terminal is set to low. ? use v cc1 ( = 5 v) to power the comparators (comp. 1 a nd comp. 2) in the external circuit shown above. ? the detection voltage of the v cc2 ( = 12 v) supply voltage is approximat ely 9.2 v/9.4 v and has a hysteresis width of approximately 0.2 v. for the formulas for finding hyst eresis width and detection voltage, refer to section 4. logic circuit diode c t
MB3773 document number: 002-08513 rev. *a page 18 of 31 example 6: monitoring low voltage and overvoltage monitoring (with hysteresis) v cc (5 1 2 3 4 8 7 6 5 MB3773 reset reset ck gnd comp. 2 example : comp. 1, comp. 2 : mb4204, mb47393 20 k ? r 6 _ + 180 k ? r 4 30 k ? r 3 5.6 k ? r 6 1.2 k ? r 1 4.7 k ? r 5 comp. 1 notes : ? comp. 1 and comp. 2 are used to monitor for overvoltage while the MB3773 is used to monitor for low voltage. detection voltages v 1l /v 1h at the time of low voltage are approxim ately 4.2 v/4.3 v. detection voltages v 2l /v 2h at the time of overvoltage are approximately 6.0 v/6.1 v.for the formulas for finding hyst eresis width and detection voltage, see example 4. ? use v cc ( = 5 v) to power the comparators (comp. 1 and comp. 2) in the external circuit shown above. logic circuit diode reset 0 v 1l v 1h v 2l v 2h v cc + _ c t
MB3773 document number: 002-08513 rev. *a page 19 of 31 example 7: monitoring supply vo ltage using delayed trigger v cc 1 2 3 4 8 7 6 5 MB3773 reset reset ck gnd logic circuit note : adding voltage such as shown in the figure to v cc increases the minimum input pulse width by 50 s (c 1 ? 1000 pf). c 1 v cc 5v 4v c t
MB3773 document number: 002-08513 rev. *a page 20 of 31 (continued) example 8: stopping watch-dog timer (monitoring only supply voltage) (a) using npn transistor these are example application circuits in which the MB3773 monitors supply volt age alone without resetting the micropro- cessor even if the latter, used in standby mode, stops sending the clock pulse to the MB3773. ? the watch-dog timer is inhibited by clamping the c t terminal voltage to v ref . the supply voltage is constantly monitored ev en while the watch-dog timer is inhibited. for this reason, a reset signal is output at the occurrence of either instantaneous disruptio n or a sudden drop to low voltage. note that in application examples (a) and (b ), the hold signal is inactive when the wa tch-dog timer is inhibited at the time of resetting. if the hold signal is active when tie microprocessor is reset, the solution is to add a gate, as in examples (c) and (d) . v cc (5 v) 1 2 3 4 8 7 6 5 MB3773 reset reset ck gnd logic circuit r 2 =1 k ? halt r 1 =1 m ? (b) using pnp transistor v cc (5 v) 1 2 3 4 8 7 6 5 MB3773 reset reset ck gnd logic circuit r 2 =1 k ? halt r 1 =51 c t c t
MB3773 document number: 002-08513 rev. *a page 21 of 31 (continued) (c) using npn transistor v cc (5 v) 1 2 3 4 8 7 6 5 c t MB3773 reset reset ck gnd logic circuit r 2 =1 k ? halt r 1 =1 m ? (d) using pnp transistor v cc (5 v) 1 2 3 4 8 7 6 5 c t MB3773 reset reset ck gnd logic circuit r 2 =1 k ? halt r 1 =51 k ?
MB3773 document number: 002-08513 rev. *a page 22 of 31 example 9: reducing reset hold time v cc ( ? 5 1 2 3 4 8 7 6 5 c t MB3773 reset reset ck gnd logic circuit (a) t pr reduction method v cc ( ? 5 v) 1 2 3 4 8 7 6 5 c t MB3773 reset reset ck gnd logic circuit notes : ? reset is the only output that can be used. ? standard t pr , t wd and t wr value can be found using the following formulas. formulas:t pr (ms) : = 100 ct ( f) t wd (ms) : = 100 ct ( f) t wr (ms) : = 16 ct ( f) ? the above formulas become standard values in determining t pr , t wd and t wr . reset hold time is compared below between the reduction circuit and the standard circuit. (b) standard usage c t ? 0.1 f t pr reduction circuit standard circuit t pr : = 10 ms 100 ms t wd : = 10 ms 10 ms t wr : = 1.6 ms 2.0 ms
MB3773 document number: 002-08513 rev. *a page 23 of 31 example 10: circuit for monitoring multiple microprocessor v cc ( ? 5 1 2 3 4 8 7 6 5 c t MB3773 reset reset ck gnd notes : ? connects from ff1 and ff2 outputs q 1 and q 2 to the nor input. ? depending on timing, these connections may not be necessary. ? example : r 1 ? r 2 ? 2.2 k ? c t ? 0.1 f reset reset ck gnd reset reset ck gnd s d 3 ck r q 3 q 3 s d 2 ck 2 r q 2 q 2 s d 1 ck r q 1 q 1 ff3 ff2 ff1 r 2 r 1 ck 1 q 1 ck 2 q 2 ck 3 q 3 nor output figure 1 figure 2 *** *: microprocessor
MB3773 document number: 002-08513 rev. *a page 24 of 31 description of application circuits using one MB3773, this application circuit monitors mult iple microprocessor in one system. si gnals from each microprocessor are sent to ff1, ff2 and ff3 clock inputs. figure 2 shows these timi ngs. each flip-flop operates us ing signals sent from microproce ssor as its clock pulse. when even one signal stops, the relevant re ceiving flip-flop stops operating. as a result, cyclical pulses are not generated at output q 3 . since the clock pulse stops arriving at the ck termi nal of the MB3773, the MB3773 generates a reset signal. note that output q 3 frequency f will be in the following range, where the clock frequencies of ck 1 , ck 2 and ck 3 are f 1 , f 2 and f 3 respectively. where f 0 is the lowest frequency among f 1 , f 2 and f 3 . 1 f 0 ---- 1 f -- - 1 f 1 ---- 1 f 2 ---- 1 f 3 ---- ++ ??
MB3773 document number: 002-08513 rev. *a page 25 of 31 crt 1 0.01 f10 k ? 30 ? s 0.1 f10 k ? 300 s example 11: circuit for limiti ng upper clock input frequency notes : ? this is an example application to limit upper frequen cy fh of clock pulses sent from the microprocessor. if the ck cycle sent from the microprocessor ex ceeds fh, the circuit g enerates a reset signal. (the lower frequency has already been set using c t .) ? when a clock pulse such as shown below is sent to terminal ck, a short t 2 prevents c 2 voltage from reaching the ck input threshold level ( : = 1.25 v), and will cause a reset signal to be output. the t 1 value can be found using the following formula : example : setting c and r allow the upper t 1 value to be set (refer to the table below). v cc (5 v) 1 2 3 4 8 7 6 5 c t reset reset ck gnd r 2 r 1 =10 k ? c 2 t r1 t 1 : = 0.3 c 2 r 2 t 2 ck waveform t 3 c 2 voltage t where v cc ? 5 v, t 3 ? 3.0 s, t 2 ? 20 s
MB3773 document number: 002-08513 rev. *a page 26 of 31 10. notes on use take account of common impedance when desi gning the earth line on a printed wiring board. take measures against static electricity. ? for semiconductors, use antistatic or conductive containers. ? when storing or carrying a printed circuit board after ch ip mounting, put it in a conductive bag or container. ? the work table, tools and measuring instruments must be grounded. ? the worker must put on a grounding device containing 250 k ? to 1 m ? resistors in series. do not apply a negative voltage ? applying a negative voltage of ? 0.3 v or less to an lsi may generate a parasitic transistor, resulting in malfunction. 11. ordering information 12. rohs compliance informat ion of lead (pb) free version the lsi products of cypress with ?e1? are co mpliant with rohs directive , and has obser ved the standard of lead, cadmium, mercu ry, hexavalent chromium, polybrominated biphenyls (pbb) , and po lybrominated diphenyl ethers (pbde) . the product that conforms to this standard is added ?e1? at the end of the part number. part number package remarks MB3773pf-ooo 8-pin plastic sop (fpt-8p-m01) conventional version MB3773pf-oooe1 8-pin plastic sop (fpt-8p-m01) lead free version
MB3773 document number: 002-08513 rev. *a page 27 of 31 13. marking format (lead free version) 14. labeling sample (lead free version) index 3773 e1xxxx xxx lead-free version 2006/03/01 assembled in japan g qc pass (3n) 1mb123456p-789-ge1 1000 (3n)2 1561190005 107210 1,000 pcs 0605 - z01a 1000 1/1 1561190005 mb123456p - 789 - ge1 mb123456p - 789 - ge1 mb123456p - 789 - ge1 pb lead-free version lead-free mark jeita logo jedec logo
MB3773 document number: 002-08513 rev. *a page 28 of 31 15. MB3773pf- ??? e1 recommended conditions of moisture sensitivity level [temperature profile for fj standard ir reflow] 1. ir (infrared reflow) 2. manual soldering (partial heating method) conditions : temperature 400c max times : 5 s max/pin item condition mounting method ir (infrared reflow) , ma nual soldering (partial heating method) mounting times 2 times storage period before opening please use it within two years after manufacture. from opening to the 2nd reflow less than 8 days when the storage period after opening was exceeded please processes within 8 days after baking (125c, 24h) storage conditions 5c to 30c, 70%rh or less (the lowest possible humidity) 260 c (e) (d') (d) 255 c 170 c 190 c rt (b) (a) (c) to note : temperature : the top of the package body (a) temperature increase gradie nt : average 1c/s to 4c/s (b) preliminary heating : temperature 170c to 190c, 60s to 180s (c) temperature increase gradient : average 1c/s to 4c/s (d) actual heating : temperature 260c max; 255c or more, 10s or less (d?) : temperature 230c or more, 40s or less or temperature 225c or more, 60s or less or temperature 220c or more, 80s or less (e) cooling : natural cooling or forced cooling h rank : 260c max.
MB3773 document number: 002-08513 rev. *a page 29 of 31 16. package dimension 8 -pin pl as tic s op le a d pitch 1.27 mm p a ck a ge width p a ck a ge length 5. 3 6. 3 5 mm le a d s h a pe gullwing s e a ling method pl as tic mold mounting height 2.25 mm max weight 0.10 g code (reference) p- s op 8 -5. 3 6. 3 5-1.27 8 -pin pl as tic s op (fpt- 8 p-m01) (fpt- 8 p-m01) c 2002 fujit s u limited f0 8 002 s -c-6-7 0.1 3 (.005) m det a il s of "a" p a rt 7. 8 00.40 5. 3 00. 3 0 (.209.012) (. 3 07.016) .250 ?.00 8 +.010 ?0.20 +0.25 6. 3 5 index 1.27(.050) 0.10(.004) 14 5 8 0.470.0 8 (.019.00 3 ) ?0.04 +0.0 3 0.17 .007 +.001 ?.002 "a" 0.25(.010) ( s t a nd off) 0~ 8 ? (mounting height) 2.00 +0.25 ?0.15 .079 +.010 ?.006 0.500.20 (.020.00 8 ) 0.600.15 (.024.006) 0.10 +0.10 ?0.05 ?.002 +.004 .004 * 1 0.10(.004) * 2 dimen s ion s in mm (inche s ). note: the v a lue s in p a renthe s e s a re reference v a lue s . note 1) * 1 : the s e dimen s ion s include re s in protru s ion. note 2) * 2 : the s e dimen s ion s do not include re s in protru s ion. note 3 )pin s width a nd pin s thickne ss include pl a ting thickne ss . note 4) pin s width do not include tie ba r cutting rem a inder.
MB3773 document number: 002-08513 rev. *a page 30 of 31 document history spansion publication number: ds04-27401-8ea document title: MB3773 power supp ly monitor with watch-dog timer document number: 002-08513 revision ecn orig. of change submission date description of change ** ? taoa 05/11/2006 migrated to cypress and assigned document number 002-08513. no change to document contents or format. *a 5199075 taoa 04/04/2016 updated to cypress format.
document number: 002-08513 rev. *a revised april 4, 2016 page 31 of 31 MB3773 ? cypress semiconductor corporation 2003-2016. this document is the property of cypress semiconductor corporation and its subsi diaries, including spansion llc ("cypress"). this document, including any software or firmware included or referenced in this document ("software"), is owned by cypress under the intellec tual property laws and treaties of the united states and other countries worldwide. cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragr aph, grant any license under its patents, copyrights, trademarks, or other intellectual property rights. if the software is not accompanied by a license agreement and you do not otherwise have a writte n agreement with cypress governing the use of the software, then cypress hereby grants you under its copyright rights in the software, a personal, non-exclusive, nontransferable license (without the r ight to sublicense) (a) for software provided in source code form, to modify and reproduce the software solely for use with cypress hardware products, only internally within your organization, and (b) to distribute the software in binary code form externally to end users (either directly or indirectly through resellers and distributors), solely for use on cypress hardware product units. cypress also gran ts you a personal, non-exclusive, nontransferable, license (without the right to sublicense) under those claims of cypress's patents that are infringed by the software (as provided by cypress, unmodified) to make, use, distribute, and import the software solely to the minimum extent that is necessary for you to exercise your rights under the copyright license granted in the previous sentence. any oth er use, reproduction, modification, translation, or compilation of the software is prohibited. cypress makes no warranty of any kind, express or implied, with regard to this document or any software, including, but not lim ited to, the implied warranties of merchantability and fitness for a particular purpose. cypress reserves the right to make changes to this document without further notice. cypress does not assume any liability arising out of the application or use of an y product or circuit described in this document. any informati on provided in this document, including any sample design information or programming code, is provided only for reference purposes. it is the responsibility of the user of this document to properly d esign, program, and test the functionality and safety of any application made of this information and any resulting product. cypress products are not designed, intended, or authorized for use as crit ical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support de vices or systems, other medical devices or systems (including r esuscitation equipment and surgical implants), pollution control or hazardous substances management, or other uses where the failure of the device or system could cause personal injury, death, or property damage ("unintended uses"). a critical component is any component of a device or system whose failure to perform can be reasonably expected to cause the failure of the device or syste m, or to affect its safety or effectiv eness. cypress is not liable, in whole or in part, and company shall and hereby does release cypress from any claim, damage, or other liability arising from or relate d to all unintended uses of cypress products. company shall indemnify and hold cypress harmless from and against all claims, costs, damages, and other liabilities, including claims for personal inj ury or death, arising from or related to any unintended uses of cypress products. cypress, the cypress logo, spansion, the spansion logo, and combinations thereof, psoc, capsense, ez-usb, f-ram, and traveo are trademarks or registered trad emarks of cypress in the united states and other countries. for a more complete list of cypre ss trademarks, visit cypress.com. other names and brands may be claimed as property of their respective owners. sales, solutions, and legal information worldwide sales and design support cypress maintains a worldwide network of offices, solution center s, manufacturer?s representatives, and distributors. to find t he office closest to you, visit us at cypress locations . products arm ? cortex ? microcontrollers cypress.com/arm automotive cypress.com/automotive clocks & buffers cypress.com/clocks interface cypress.com/interface lighting & power control cypress.com/powerpsoc memory cypress.com/memory psoc cypress.com/psoc touch sensing cypress.com/touch usb controllers cypress.com/usb wireless/rf cypress.com/wireless psoc ? solutions cypress.com/psoc psoc 1 | psoc 3 | psoc 4 | psoc 5lp cypress developer community community | forums | blogs | video | training technical support cypress.com/support

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